? features ? low drain-source on-state resistance rds(on) typ = 16 m ? (vgs = 4.5 v) ? high-speed switching : qg = 5.1 nc ? halogen-free / rohs compliant (eu rohs / ul-94 v-0 / msl:level 1 compliant) ? marking symbol: ? packaging embossed type (thermo-compression sealing) : 000 pcs / reel (standard) ? absolute maximum ratin g s ta = 25 ? c channel temperature storage temperature range note) *1 device mounted on a glass-epoxy board (see figure 1) *2 pulse test: ensure that the channel temperature does not exceed 150 ? c page 2. source 6. drain mos fet product standards FK8V03050L 4. gate 8. drain 3. source 7. drain tch 150 ? c +85 ? c tstg -55 to +150 ? c total power dissipation (steady state) *1 pd 1 w total power dissipation (t = 10 s) *1 1.5 for lithium-ion secondary battery protecion circuit for dc-dc converter 1 source 7. drain 8. drain 6. parameter of 6 unit: mm 1. source 5. drain 2. source 3. drain code D FK8V03050L silicon n-channel mosfet panasonic wmini8-f1 jeita sc-115 4. gate drain-source voltage vds 33 v 3 symbol rating unit gate-source voltage vgs ? 20 v 32 8 source current (pulsed) (body diode) *1,*2 isp (bd) 8 internal connection pin name 1. source 5. drain drain current (steady state) *1 id 3e operating ambient temperature topr -40 to a drain current (t = 10 s) *1 10 drain current (pulsed) *1,*2 idp figure1 fr4 glass-epoxy board 25.4 mm ? 25.4 mm ? 0.8 mm 2.8 2.9 (0.81) 2.4 0.3 0.16 0.65 1234 5 6 7 8 4 (g) 3 (s) (d) 5 1 (s) 2 (s) (d) 8 (d) 7 (d) 6 d o c n o . t t4 - ea - 13029 r e v i sio n . 3 e s t a b li s h e d : 2011 - 01 - 13 r e v i s e d : 2013 - 08 - 08
? electrical characteristics ta = 25 ? c ? 3 ? c static characteristics dynamic characteristics bod y diode characteristi c note) measuring methods are based on japanese industrial standard jis c 7030 measuring methods for transistors. *1 pulse test: ensure that the channel temperature does not exceed 150 ? c *2 measurement circuit for turn-on delay time/rise time/turn-off delay time/fall time page id = 4 a id = 4 a 1. 2. diode forward voltage *1 vsd is = 4 a, vgs = 0 v qg FK8V03050L mos fet product standards v 2.3 0.8 1.2 5.1 nc gate-source charge qgs 1.8 gate-drain charge qgd total gate charge vdd = 15 v, vgs = 0 to 4.5 v, id = 8 a vdd = 15 v, vgs = 10 to 0 v fall time *2 tf 10 ns rise time *2 tr 4 turn-off delay time *2 td(off) 32 70 turn-on delay time *2 td(on) 8 vdd = 15 v, vgs = 0 to 10 v 520 pf output capacitance coss 110 reverse transfer capacitance crss input capacitance ciss vds = 10 v, vgs = 0 v, f = 1 mhz m ? id = 4a, vgs = 4.5 v 16 25 2.5 v drain-source on-state resistance *1 id = 4a, vgs = 10 v rds(on)1 rds(on)2 11 15 gate-source threshold voltage vth id = 0.73 ma, vds = 10 v 1 10 ? a gate-source leakage current igss vgs = ? 16 v, vds = 0 v ? 10 ? a zero gate voltage drain current idss vds = 33 v, vgs = 0 v typ max unit drain-source breakdown voltage vdss id = 1 ma, vgs = 0 v 33 v parameter symbol conditions min 2of6 d o c n o . t t4 - ea - 13029 r e v i sio n . 3 e s t a b li s h e d : 2011 - 01 - 13 r e v i s e d : 2013 - 08 - 08
*2 measurement circuit for turn-on delay time/rise time/turn-off delay time/fall time id = 4 a page FK8V03050L mos fet product standards 3of6 vdd = 15 v vou t vin vin 0v 10v pw = 10 s d.c. Q 1 % d s g 50 ? 10% 90% 90% 10% 90% 10% vin vou t td(on) tr td(off) tf d o c n o . t t4 - ea - 13029 r e v i sio n . 3 e s t a b li s h e d : 2011 - 01 - 13 r e v i s e d : 2013 - 08 - 08
technical data ( reference ) page product standards capacitance - vds dynamic input/output characteristics FK8V03050L mos fet id - vds id - vgs 4of6 vds - vgs rds(on) - id 0 2 4 6 8 10 0 0.1 0.2 0.3 drain-source voltage vds (v) drain current id (a) 3.0 v 3.5 v 4.5 v 4.0 v vgs = 10.0 v 0 1 2 3 4 5 012345 gate-source voltage vgs (v) drain current id (a) 25 ta = 85 -40 1 10 100 110 drain current id (a) drain source on-state resistance rds(on) (m ? ) 10.0 v vgs = 4.5 v 0 0.05 0.1 0.15 0.2 0.25 0.3 0246810 gate-source voltage vgs (v) drain-source voltage vds (v) 2.0 a 4.0 a id = 8.0 a 10 100 1000 10000 0.1 1 10 100 drain-source voltage vds (v) capacitance c (pf) ciss coss crss 0 1 2 3 4 5 02468 total gate charge qg (nc) gate-source voltage vgs (v) vdd = 15 v d o c n o . t t4 - ea - 13029 r e v i sio n . 3 e s t a b li s h e d : 2011 - 01 - 13 r e v i s e d : 2013 - 08 - 08
technical data ( reference ) page product standards vth - ta rds(on) - ta safe operating area 5of6 pd - ta rth - tsw FK8V03050L mos fet 0 0.5 1 1.5 2 2.5 -50 0 50 100 150 temperature ( ) gate-source threshold voltage vth (v) 0 10 20 30 -50 0 50 100 150 temperature ( ) drain-source on-resistance rds(on) (m ? ) vgs = 4.5 v 10.0 v 0 0.5 1 1.5 0 50 100 150 temperature ta ( ? c) total power dissipation pd (w) 0.1 1 10 100 1000 0.01 0.1 1 10 100 1000 pulse width tsw (s) thermal resistance rth ( ? c/w) 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 vds(v) ids(a) operation in this area is limited by rds(on) ta=25 , glass epoxy board ( 25.4 25.4 t0.8mm ) coated with copper foil, which has more than 300mm 2 . 10 ms 100 ms 1 s dc idp = 32 a 1 ms d o c n o . t t4 - ea - 13029 r e v i sio n . 3 e s t a b li s h e d : 2011 - 01 - 13 r e v i s e d : 2013 - 08 - 08
unit : mm page FK8V03050L mos fet product standards wmini8-f1 ? 6 of 6 land pattern (reference) (unit : mm) 0.16 +0.10 -0.05 2.9 0.1 0.65 2.8 0.1 0 to 0.02 (0.2) 0.80 0.05 0.30 +0.10 -0.05 2.4 0.1 (0.15) 1234 5 6 7 8 (5) (5) 0.65 0.65 0.65 0.4 0.65 2.4 d o c n o . t t4 - ea - 13029 r e v i sio n . 3 e s t a b li s h e d : 2011 - 01 - 13 r e v i s e d : 2013 - 08 - 08
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